Power semiconductor module



FIG. 1 is a front elevation view of a power semiconductor module,showing our new design;

FIG. 2 is a top plan view thereof;

FIG. 3 is a top, side perspective view thereof;

FIG. 4 is another top, side perspective view thereof;

FIG. 5 is a side elevational view thereof;

FIG. 6 is a bottom plan view thereof; and,

FIG. 7 is a rear elevation view thereof.

Broken lines form no part of the claimed design and surface shadingrepresents contour and not surface ornamentation.

CLAIM The ornamental design for a power semiconductor module, as shownand described.